Lead FPGA Design Engineer

General Overview

Functional Area:  Engineering        
Career Stream:  Design - Software Engineering
SAP Short Name:  LEN-ENG-DSE
Job Level:  Level 08
IC/MGR:  Individual Contributor        
Direct/Indirect Indicator:  Indirect

Summary

Celestica is seeking a Lead FPGA Design Engineer to serve as a technical authority in system architecture and advanced digital design for cutting-edge, next-generation products. This role combines deep technical expertise with project leadership, driving innovation from early concept through production. You will define scalable architectures, guide global teams, and enable breakthrough solutions across emerging technologies and future platforms.

Detailed Description

Responsibilities

System Architecture & Innovation

• Define end-to-end FPGA and digital system architectures for advanced and future-focused products
• Drive innovation in next-generation hardware platforms and technologies
• Establish scalable and reusable architectures across evolving product lines
• Evaluate emerging technologies and translate them into practical system designs

Project Leadership

• Lead full lifecycle development projects, from concept, prototyping, to production
• Drive execution across cross-functional teams (hardware, software, validation)
• Set technical direction, timelines, and ensure high-quality delivery
• Mentor engineers and elevate overall engineering standards and capability

Design & Development

• Lead development of complex FPGA designs using Verilog/VHDL
• Define best practices in RTL design, modular architecture, and performance optimization
• Guide high-level modeling and architectural exploration using Python or C/C++

System Integration

• Act as the primary technical liaison between hardware and software domains
• Ensure seamless integration of FPGA subsystems into complete system solutions
• Define system interfaces, data flows, and integration strategies

Verification & Bring-Up

• Oversee system bring-up, validation, and debugging
• Establish robust verification methodologies and best practices
• Resolve complex system-level issues in collaboration with validation teams

Technical Problem Solving

• Lead resolution of critical architectural and design challenges
• Perform root-cause analysis across multi-layer systems
• Ensure long-term scalability, performance, and reliability

Knowledge/Skills/Competencies

Qualifications

● Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or related field

● Minimum 7+ years of direct industry experience in FPGA design

● Additional Experience (Plus)

○ Experience in health technology, medical devices, or regulated environments

○ Familiarity with high-speed interfaces such as Ethernet, PCIe, or SERDES

○ Background in data-intensive or real-time processing systems (e.g., imaging, instrumentation)

● Expert-level proficiency in Verilog/VHDL and FPGA design methodologies

● Strong experience in system architecture and hardware/software co-design

● Proficiency in Python or C/C++ for modeling and simulation

● Deep understanding of:

○ Digital logic design

○ Electronic circuits and schematics

○ Hardware debugging and diagnostic tools

● Proven ability to lead complex engineering projects end-to-end

● Excellent analytical, problem-solving, and decision-making skills

● Strong communication skills, capable of influencing senior technical stakeholders

● Fluent in English - both writing and speaking

Physical Demands

• Duties of this position are performed in a normal office environment.
• Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data. 
• Repetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required.
• Occasional travel may be required.

Notes

This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.