11- Manager- Test SME- Rack Test and failure analysis

Summary

The Test Development Engineer is responsible for architecting, coding, and deploying advanced hardware and software test solutions across all manufacturing stages of high-performance compute infrastructure. This role focuses on maximizing fault coverage and yield throughput by designing customized functional test (FCT) code, configuring automated test equipment (ATE) fixtures, integrating high-speed JTAG/Boundary Scan diagnostics, and working with tier-1 silicon architects to execute comprehensive test validation routines.

Detailed Description

Design for Testability (DFT) & Proactive Planning

• DFT Optimization: Analyze circuit schematics and layout files to ensure adequate physical test point allocation, maximizing structural test access metrics before design release.

• Silicon Diagnostic Hookup: Collaborate with tier-1 chip vendors (e.g., Nvidia, Broadcom, Marvell) to implement and exercise built-in self-test (BIST), custom firmware loops, and JTAG boundaries.

2. Test Hardware & Software Solution Development

• Automated Software Architecture: Develop, debug, and maintain scalable automated test code scripts using Python, C/C++, or LabVIEW to control instruments and extract diagnostics.

• Fixture & Interface Design: Specify, debug, and qualify hardware test interfaces, bed-of-nails fixtures, loopback cards, and switching matrices for ICT, FCT, and System-Level Test (SLT).

• Coverage Metric Validation: Map and maintain comprehensive test coverage matrices, linking structural diagnostic coverage to systemic product escape mitigations.

3. Production Tuning & Analytics

• Yield & GR&R Optimization: Perform Gauge R&R studies, stability analysis, and statistical limit tuning (SPC) to eradicate false-failures and optimize overall test sequence cycle times.

• Debug & Failure Analytics: Provide rapid deep-dive diagnostic support for initial prototype failures, cross-referencing diagnostic log outputs with SMT and box build history to identify systemic defects.

#HPS-NA

Knowledge/Skills/Competencies

• Software Fluency: Strong proficiency coding in Python, C/C++, Linux shell scripting, or LabVIEW within test automation environments.

• Hardware Fluency: Expertise operating oscilloscopes, spectrum analyzers, high-speed BERTs, and boundary scan tools (e.g., JTAG Provision, Corelis). Deep understanding of ICT/FCT/SLT platforms.

Physical Demands

• Duties of this position are performed in a manufacturing environment with frequent exposure to elements such as noise, dust, chemicals, operating machinery, temperature extremes, etc.
• Duties of this position require periodic light physical effort and exertion including prolonged repetitive motion, standing, sitting in a confined work space, climbing, using equipment, handling lightweight materials, etc.
• Duties of this position require periodic heavy manual effort and considerable exertion including lifting objects over 20 pounds, requiring straining, pulling and lifting.
• Duties may require periodic sustained visual concentration on a computer monitor or on numbers and other detailed data.
• May require occasional travel.

Typical Experience

• Experience: 3+ years of experience in hardware test development, manufacturing test software execution, or diagnostic code engineering.

Typical Education

 Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or closely related field.

• Educational requirements may vary by geography.

Notes

This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.